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Nordic Semiconductor /nrf51 /GPIOTE /INTENSET

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Interpret as INTENSET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disabled)IN0 0 (Disabled)IN1 0 (Disabled)IN2 0 (Disabled)IN3 0 (Disabled)PORT

IN1=Disabled, IN2=Disabled, IN3=Disabled, PORT=Disabled, IN0=Disabled

Description

Interrupt enable set register.

Fields

IN0

Enable interrupt on IN[0] event.

0 (Disabled): Interrupt disabled.

1 (Set): Enable interrupt on write.

1 (Enabled): Interrupt enabled.
IN1

Enable interrupt on IN[1] event.

0 (Disabled): Interrupt disabled.

1 (Set): Enable interrupt on write.

1 (Enabled): Interrupt enabled.
IN2

Enable interrupt on IN[2] event.

0 (Disabled): Interrupt disabled.

1 (Enabled): Interrupt enabled.

1 (Set): Enable interrupt on write.
IN3

Enable interrupt on IN[3] event.

0 (Disabled): Interrupt disabled.

1 (Set): Enable interrupt on write.

1 (Enabled): Interrupt enabled.
PORT

Enable interrupt on PORT event.

0 (Disabled): Interrupt disabled.

1 (Set): Enable interrupt on write.

1 (Enabled): Interrupt enabled.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data